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FEATURES Very Low-Noise, 5 nV//Hz @ 1 kHz Max Excellent Input Offset Voltage, 0.4 mV Max Low Offset Voltage Drift, 2 V/ C Max Very High Gain, 1000 V/mV Min Outstanding CMR, 110 dB Min Slew Rate, 2 V/ s Typ Gain-Bandwidth Product, 6 MHz Typ Industry Standard Quad Pinouts Available in Die Form GENERAL DESCRIPTION
Very Low Noise Quad Operational Amplifier OP470
The OP470 offers excellent amplifier matching which is important for applications such as multiple gain blocks, low noise instrumentation amplifiers, quad buffers, and low noise active filters. The OP470 conforms to the industry standard 14-pin DIP pinout. It is pin compatible with the LM148/149, HA4741, HA5104, and RM4156 quad op amps and can be used to upgrade systems using these devices. For higher speed applications, the OP471, with a slew rate of 8 V/ms, is recommended.
PIN CONNECTIONS 14-Lead Hermetic Dip (Y-Suffix) 14-Lead Plastic Dip (P-Suffix)
OUT A -IN A +IN A V+ +IN B -IN B OUT B OUT D -IN D +IN D V- +IN C -IN C OUT C
The OP470 is a high-performance monolithic quad operational amplifier with exceptionally low voltage noise, 5 nV/X/ Hz at 1 kHz Max, offering comparable performance to ADI's industry standard OP27. The OP470 features an input offset voltage below 0.4 mV, excellent for a quad op amp, and an offset drift under 2 mV/C, guaranteed over the full military temperature range. Open loop gain of the OP470 is over 1,000,000 into a 10 kW load ensuring excellent gain accuracy and linearity, even in high gain applications. Input bias current is under 25 nA, which reduces errors due to signal source resistance. The OP470's CMR of over 110 dB and PSRR of less than 1.8 mV/V significantly reduce errors due to ground noise and power supply fluctuations. Power consumption of the quad OP470 is half that of four OP27s, a significant advantage for power conscious applications. The OP470 is unity-gain stable with a gain bandwidth product of 6 MHz and a slew rate of 2 V/ms.
16-Lead SOIC Package (R-Suffix)
OUT A 1 -IN A 2
16 OUT D 15 -IN D 14 +IN D
1 2 3 4 5 6 7
14 13 12
+IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7 NC 8
OP470
13 V- 12 +IN C 11 -IN C 10 OUT C 9
OP470
11 10 9 8
NC
NC = NO CONNECT
SIMPLIFIED SCHEMATIC
V+
BIAS
-IN
+IN
V-
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2002
OP470-SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (at V =
S
15 V, TA = 25 C, unless otherwise noted.)
OP470A/E OP470F OP470G
Parameter INPUT OFFSET VOLTAGE INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE INPUT NOISE Voltage Density
Symbol Conditions VOS IOS IB enp-p VCM = 0 V VCM = 0 V 0.1 Hz to 10 Hz (Note 1) fO = 10 Hz fO = 100 Hz fO = 1 kHz (Note 2) fO = 10 Hz fO = 100 Hz fO = 1 kHz V = 10 V RL = 10 kW RL = 2 kW (Note 3) RL 2 kW VCM = 11 V VS = 4.5 V to 18 V
Min Typ Max 0.1 3 6 80 3.8 3.3 3.2 1.7 0.7 0.4 1000 2300 500 1200 11 12 110 12 13 125 0.56 1.8 1.4 2 9 6 125 155 11 0.4 10 25 200 6.5 5.5 5.0
Min Typ Max 0.2 6 15 80 3.8 3.3 3.2 1.7 0.7 0.4 800 1700 400 900 11 12 12 13 100 120 1.0 1.4 2 9 6 125 155 11 5.6 0.8 20 50 200 6.5 5.5 5.0
Min Typ Max 0.4 12 25 80 3.8 3.3 3.2 1.7 07 0.4 800 1700 400 900 11 12 12 13 100 120 1.0 1.4 2 9 6 125 155 11 5.6 1.0 30 60 200 6.5 5.5 5.0
Unit mV nA nA nVp-p
en
nV/Hz
INPUT NOISE Current Density LARGE-SIGNAL Voltage Gain INPUT VOLTAGE RANGE OUTPUT VOLTAGE SWING COMMON-MODE REJECTION POWER SUPPLY Rejection Ratio SLEW RATE SUPPLY CURRENT (All Amplifiers) GAIN BANDWIDTH PRODUCT CHANNEL SEPARATION INPUT CAPACITANCE INPUT RESISTANCE Differential-Mode INPUT RESISTANCE Common-Mode SETTLING TIME
NOTES 1 Guaranteed but not 100% tested 2 Sample tested 3 Guaranteed by CMR test
in
pA/Hz
AVO
V/mV
IVR VO CMR PSRR SR ISY GBW CS
V V dB mV/V V/ms mA MHz dB
No Load AV = 10 VO = 20 Vp-p fO = 10 Hz (Note 1)
CIN RIN
2 0.4
2 0.4
2 0.4
pF MW
RINCM tS AV = 1 to 0.1% to 0.01 %
11 5.5 6.0
11 5.5 6.0
11 5.5 6.0
GW ms
-2-
REV. A
OP470 ELECTRICAL CHARACTERISTICS
Parameter INPUT OFFSET VOLTAGE AVERAGE INPUT Offset Voltage Drift INPUT OFFSET CURRENT INPUT BIAS CURRENT LARGE-SIGNAL Voltage Gain INPUT VOLTAGE RANGE* OUTPUT VOLTAGE SWING COMMON-MODE REJECTION POWER SUPPLY REJECTION RATIO SUPPLY CURRENT (All Amplifiers)
NOTE
*Guaranteed
(at VS =
15 V, -55 C TA 125 C for OP470A, unless otherwise noted.)
OP470A Min Typ 0.14 0.4 Max 0.6 2 20 20 Unit mV mV/C nA nA V/mV V V dB 5.6 11 mV/V mA
Symbol VOS TCVOS IOS IB AVO IVR VO CMR PSRR ISY
Conditions
VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kW RL = 2 kW RL 2 kW VCM = 11 V VS = 4.5 V to 18 V No Load -- 750 400 11 12 100
5 15 1600 800 12 13 120 1.0 9.2
by CMR test
ELECTRICAL CHARACTERISTICS
Parameter INPUT OFFSET VOLTAGE AVERAGE INPUT Offset Voltage Drift INPUT OFFSET CURRENT INPUT BIAS CURRENT LARGE-SIGNAL Voltage Gain INPUT VOLTAGE RANGE* OUTPUT VOLTAGE SWING COMMON-MODE REJECTION POWER SUPPLY Rejection Ratio SUPPLY CURRENT (All Amplifiers)
NOTE
*Guaranteed
(at Vs = 15 V, -25 C TA 85 C for OP470E/OP470EF, -40 C TA 85 C for OP470G, unless otherwise noted.)
OP470E OP470F OP470G
Symbol Conditions VOS TCVOS IOS IB AVO VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kW RL = 2 kW
Min Typ Max 0.12 0.5 0.4 4 11 800 400 11 1800 900 12 13 120 0.7 5.6 2 20 50
Min Typ Max 0.24 1.0 0.6 7 20 600 1400 300 700 11 12 12 13 90 115 1.8 10 4 40 70
Min Typ Max 0.5 2 20 40 600 1500 300 800 11 12 12 13 90 110 1.8 10 50 75 1.5
Unit mV mV/C nA nA V/mV
IVR VO CMR PSRR RL 2 kW VCM = 11 V VS = 4.5 V to 18 V
V V dB mV/V
12 100
ISY
No Load
--
9.2
11
--
9.2
11
--
9.3
11
mA
by CMR test
REV. A
-3-
OP470-SPECIFICATIONS
WAFER TEST LIMITS (at V =
s
15 V, 25 C, unless otherwise noted.)
OP470GBC
Parameter INPUT OFFSET VOLTAGE INPUT OFFSET CURRENT INPUT BIAS CURRENT LARGE-SIGNAL Voltage Gain INPUT VOLTAGE RANGE* OUTPUT VOLTAGE SWING COMMON-MODE REJECTION POWER SUPPLY REJECTION RATIO SUPPLY CURRENT (All Amplifiers)
NOTE
Symbol VOS IOS IB AVO IVR VO CMR PSRR ISY
Conditions VCM = 0 V VCM = 0 V VO = 10 V RL = 10 kW RL = 2 kW RL 2 kW VCM = 11 V VS = 4.5 V to 18 V No Load
Limit 0.8 20 50 800 400 11 12 100 5.6 11
Unit mV MAX nA MAX nA MIN V/mV MIN V MIN V MIN dB mV/V MAX mA MAX
*Guaranteed by CMR test Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
-4-
REV. A
OP470
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . 1.0 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . 25 mA Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous Storage Temperature Range P, Y Package . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300C Junction Temperature (Tj) . . . . . . . . . . . . . -65C to +150C Operating Temperature Range OP470A . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C OP470E, OP470F . . . . . . . . . . . . . . . . . . . -25C to +85C OP470G . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C
ORDERING GUIDE ABSOLUTE MAXIMUM RATINGS 1
Package Type
3 jA
jc
Unit C/W C/W C/W
14-Lead Hermetic DIP(Y) 94 14-Lead Plastic DiP(P) 16-Lead SOL (S) 76 88
10 33 23
NOTES 1 Absolute Maximum Ratings apply to both DICE and packaged parts, unless otherwise noted. 2 The OP470's inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise performance. If differential voltage exceeds 1.0 V, the input current should be limited to 25 mA. 3 jA is specified for worst case mounting conditions, i.e., jA is specified for device in socket for TO, CerDIP, PDIP, packages; jA is specified for device soldered to printed circuit board for SO packages.
+IN B
V+
+IN A
Package Options TA = 25C VOS MAX ( V) 400 400 400 800 1000 1000 Cerdip 14-Pin OP470AY* OP470EY OP470FY* OP470GP OP470GS Operating Temperature Range MIL MIL IND IND XIND XIND
-IN B
-IN A
Plastic
OUT B
OUT A
OUT C
OUT D
-IN D
*Not for new design; obsolete April 2002.
For military processed devices, please refer to the standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp SMD Part Number 59628856501CA 596288565012A 596288565013A*
*Not for new designs; obsolete April 2002.
-IN C +IN C
V-
+IN D
DIE SIZE 0.163 0.106 INCH, 17,278 SQ. mm (4.14 2.69 mm, 11.14 SQ. mm)
ADI Equivalent OP470AYMDA OP470ARCMDA OP470ATCMDA
Figure 1. Dice Characteristics
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP470 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-5-
OP470 -Typical Performance Characteristics
VOLTAGE NOISE - nV/ Hz
VOLTAGE NOISE - nV/ Hz
AT 10Hz 4 AT 1kHz 3
NOISE VOLTAGE - 100nV/DIV
10 9 8 7 6 5 4 3 I/F CORNER = 5Hz
5
TA = 25 C VS = 15V
TA = 25 C
5mV
100 90
1s
2
10 0%
2
TA = 25 C VS = 15V
1 1 10 100 FREQUENCY - Hz 1k
1
0
0 5 10 15 20 SUPPLY VOLTAGE - V
2
4 6 TIME - Secs
8
10
TPC 1. Voltage Noise Density vs. Frequency
TPC 2. Voltage Noise Density vs. Supply Voltage
TPC 3. 0.1 Hz to 10 Hz Noise
10.0
INPUT OFFSET VOLTAGE - V
120 100 80 60 40 20 0 -75 -50
CHANGE IN OFFSET VOLTAGE - V
TA = 25 C VS = 15V
140 VS = 15V
10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 TIME - Mins 4 5 TA = 25 C VS = 15V
CURRENT NOISE - pA/ Hz
1.0
I/F CORNER = 200Hz 0.1 10
100 1k FREQUENCY - Hz
10k
-25 0 25 50 75 TEMPERATURE - C
100
125
TPC 4. Current Noise Density vs. Frequency
TPC 5. Input Offset Voltage vs. Temperature
TPC 6. Warm-Up Offset Voltage Drift
20
INPUT OFFSET CURRENT - nA
10 VS = 15V VCM = 0V 9 8 7 6 5 4 3 2 1 VS = 15V VCM = 0V
9 TA = 25 C VS = 15V
INPUT BIAS CURRENT - nA
15
INPUT BIAS CURRENT - nA
-25 0 25 50 75 TEMPERSTURE - C 100 125
8
7
10
6
5
5
0 -75 -50
-25 0 25 50 75 TEMPERATURE - C
100
125
0 -75 -50
4 -12.5
-7.5 -2.5 2.5 7.5 COMMON-MODE VOLTAGE - V
12.5
TPC 7. Input Bias Current vs. Temperature
TPC 8. Input Offset Current vs. Temperature
TPC 9. Input Bias Current vs. Common-Mode Voltage
-6-
REV. 0
OP470
130 120 110 100 90 TOTAL SUPPLY CURRENT - mA TA = 25 C VS = 15V 10 TOTAL SUPPLY CURRENT - mA TA = +25 C 8 TA = +125 C
10 9 8 7 6 5 4 3 2 -75 -50 VS = 15V
CMR - dB
80 70 60 50 40 30 20 10 1 10 100 1k 10k FREQUENCY - Hz 100k 1M
6
TA = -55 C
4
2
0
5
10
15
20
-25
0
25
50
75
100 125
SUPPLY VOLTAGE - V
TEMPERSTURE - C
TPC 10. CMR vs. Frequency
TPC 11. Total Supply Current vs. Supply Voltage
TPC 12. Total Supply Current vs. Supply Voltage
140 130 120 110 100
PSR - dB
TA = 25 C
OPEN-LOOP GAIN - dB
140 130 120 110 100 90 80 70 60 50 40 30 20 10 0
80 TA = 25 C VS = 15V
CLOSED-LOOP GAIN - dB
60
90 80 70 60 50 40 30 20 10 0 1 10 100 +PSR
40
-PSR
20
0
1k 10k 100k 1M 10M 100M FREQUENCY - Hz
1
10
100
1k
10k 100k 1M 10M 100M
-20 1k
10k
FREQUENCY - Hz
100k 1M FREQUENCY - Hz
10M
TPC 13. PSR vs. Frequency
TPC 14. Open-Loop Gain vs. Frequency
TPC 15. Closed-Loop Gain vs. Frequency
25 PHASE 20 15 GAIN TA = 25 C VS = 15V
80 100
OPEN-LOOP GAIN - V/mV
5000 TA = 25 C RL = 10k
PHASE MARGIN - Degrees PHASE SHIFT - Degrees
80 VS = GBW 70 15V
8
4000
120 140 160 180 200 220 2 3 4 5 6 7 8 9 10 FREQUENCY - MHz
6
10 5 0 -5
3000
PHASE MARGIN = 58
60
4
2000
50
2
1000
-10 1
0
0
5
10 15 SUPPLY VOLTAGE - V
20
25
40 -75 -50 -25
0 0 25 50 75 100 125 150 TEMPERATURE - C
TPC 16. Open-Loop Gain, Phase Shift vs. Frequency
TPC 17. Open-Loop Gain vs. Supply Voltage
TPC 18. Gain-Bandwidth Product, Phase Margin vs. Temperature
REV. 0
-7-
GAIN-BANDWIDTH PRODUCT - MHz
GAIN - dB
OP470
28 PEAK-TO-PEAK AMPLITUDE - V 24 20 16 12 8 4 0 1k TA = 25 C VS = 15V THD = 1%
MAXIMUM OUTPUT - V
20 18 16 TA = 25 C VS = 15V
100 TA = 25 C VS = 15V VIN = 100mV AV = 1
80 OVERSHOOT - %
POSITIVE SWING NEGATIVE SWING
14 12 10 8 6 4 2
60
40
20
10k
100k 1M FREQUENCY - Hz
10M
0 100
1k LOAD RESISTANCE -
10k
0
0
200 400 600 800 CAPACITIVE LOAD - pF
1000
TPC 19. Maximum Output Swing vs. Frequency
TPC 20. Maximum Output Voltage vs. Load Resistance
TPC 21. Small-Signal Overshoot vs. Capacitive Load
360 300
OUTPUT IMPEDANCE -
4.0
TA = 25 C VS = 15V
170
VS = 3.5
SLEW RATE - V/ s
15V
CHANNEL SEPARATION - dB
160 150 140 130 120 110 100 90 80 70 60 50 10
TA = 25 C VS = 15V VO = 20V p-p TO 10kHz
240 180 120 AV = 100 60 AV = 1 0 100 1k 10k 100k 1M FREQUENCY - Hz 10M 100M
3.0 2.5 -SR 2.0 +SR
1.5 1.0 0 25 50 75 -75 -50 -25 TEMPERATURE - C
100 125
100
1k 10k 100k FREQUENCY - Hz
1M
10M
TPC 22. Output Impedance vs. Frequency
TPC 23. Slew Rate vs. Temperature
TPC 24. Channel Separation vs. Frequency
1 TA = 25 C VS = 15V VO = 10V p-p RL = 2k DISTORTION - % 0.1
100
90
TA = 25 C VS = 15V AV = 1
100 90
TA = 25 C VS = 15V AV = 1
0.01
AV = -10
10
0%
10 0%
AV = 1 0.001 10 100 1k FREQUENCY - Hz 10k
5V
20s
50mV
0.2s
TPC 25. Total Harmonic Distortion vs. Frequency
TPC 26. Large-Signal Transient Response
TPC 27. Small-Signal Transient Response
-8-
REV. 0
OP470
5k 500
1/4 OP470
V1 20V p-p
50k 50
The total noise is referred to the input and at the output would be amplified by the circuit gain. Figure 4 shows the relationship between total noise at 1 kHz and source resistance. For RS < 1 kW the total noise is dominated by the voltage noise of the OP470. As RS rises above 1 kW, total noise increases and is dominated by resistor noise rather than by voltage or current noise of the OP470. When RS exceeds 20 kW, current noise of the OP470 becomes the major contributor to total noise. Figure 5 also shows the relationship between total noise and source resistance, but at 10 Hz. Total noise increases more quickly than shown in Figure 4 because current noise is inversely proportional to the square root of frequency. In Figure 5, current noise of the OP470 dominates the total noise when RS > 5 kW. From Figures 4 and 5 it can be seen that to reduce total noise, source resistance must be kept to a minimum. In applications with a high source resistance, the OP400, with lower current noise than the OP470, will provide lower total noise.
100
1/4 OP470
V2
CHANNEL SEPARATION = 20 LOG
V1 V2/1000
Figure 2. Channel Separation Test Circuit
+18V 2 3 A 11 -18V 4 1 +1V 5 6 B 7
+1V
TOTAL NOISE - nV/ Hz
OP11 10 OP400 OP471
9 10 C 8 -1V
13 12 D 14
-1V
OP470
Figure 3. Burn-In Circuit
APPLICATIONS INFORMATION Voltage and Current Noise
1 100
RESISTOR NOISE ONLY
1k 10k RS - SOURCE RESISTANCE -
100k
TOTAL NOISE - nV/ Hz
The OP470 is a very low-noise quad op amp, exhibiting a typical voltage noise of only 3.2 nV/Hz @ 1 kHz. The exceptionally low-noise characteristics of the OP470 are in part achieved by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the outstanding voltage noise performance of the OP470 is gained at the expense of current noise performance, which is typical for low noise amplifiers. To obtain the best noise performance in a circuit, it is vital to understand the relationship between voltage noise (en), current noise (in), and resistor noise (et).
TOTAL NOISE AND SOURCE RESISTANCE
Figure 4. Total Noise vs. Source Resistance (Including Resistor Noise) at 1 kHz
100
OP11 OP400 10 OP471
OP470 RESISTOR NOISE ONLY 1 100
The total noise of an op amp can be calculated by:
En =
where:
(E n ) + (i n R S ) + (E t )
2 2
2
1k 10k RS - SOURCE RESISTANCE -
100k
Figure 5. Total Noise vs. Source Resistance (Including Resistor Noise) at 10 Hz
En = total input referred noise en = up amp voltage noise in = op amp current noise et = source resistance thermal noise RS = source resistance
REV. A
-9-
OP470
Figure 6 shows peak-to-peak noise versus source resistance over the 0.1 Hz to 10 Hz range. Once again, at low values of RS, the voltage noise of the OP470 is the major contributor to peak-to-peak noise with current noise the major contributor as RS increases. The crossover point between the OP470 and the OP400 for peak-to-peak noise is at RS= 17 kW. The OP471 is a higher speed version of the OP470, with a slew rate of 8 V/ms. Noise of the OP471 is only slightly higher than the OP470. Like the OP470, the OP471 is unity-gain stable.
1000 OP11
TABLE I.
Source Strain gauge Magnetic tapehead
Device Impedance <500 W <1500 W
Comments Typically used in low frequency applications. Low IB very important to reduce self-magnetization problems when direct coupling is used. OP470 IB can be neglected. Similar need for low IB in direct coupled applications. OP470 will not introduce any selfmagnetization problem. Used in rugged servo-feedback applications. Bandwidth of interest is 400 Hz to 5 kHz.
PEAK-TO-PEAK NOISE - nV/ Hz
OP400
Magnetic phonograph cartridges
<1500 W
OP471 100 OP470 RESISTOR NOISE ONLY
Linear variable <1500 W differential transformer
For further information regarding noise calculations, see "Minimization of Noise in Op Amp Applications," Application Note AN-15.
NOISE MEASUREMENTS-- PEAK-TO-PEAK VOLTAGE NOISE
10 100 1k 10k RS - SOURCE RESISTANCE - 100k
Figure 6. Peak-To-Peak Noise (0.1 Hz to 10 Hz) vs. Source Resistance (Includes Resistor Noise)
The circuit of Figure 7 is a test setup for measuring peak-to-peak voltage noise. To measure the 200 nV peak-to-peak noise specification of the OP470 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 5 mV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens of nanovolts. 2. For similar reasons, the device must be well-shielded from air currents. Shielding also minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also "feedthrough" to increase the observed noise.
For reference, typical source resistances of some signal sources are listed in Table I.
R3 1.24k R1 5 R2 5
OP470 DUT OP27E
R5 909 R4 200
C1 2F C4 0.22 F R10 65.4k R11 65.4k C3 0.22 F R14 4.99k
R6 600k
D1 1N4148
D2 OP15E 1N4148 R9 306k R8 10k
OP15E
R13 5.9k
eOUT C5 1F
C2 0.032 F
R12 10k GAIN = 50,000 VS = 5V
Figure 7. Peak-To-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz)
-10-
REV. A
OP470
4. The test time to measure 0.1 Hz to 10 Hz noise should not exceed 10 seconds. As shown in the noise-tester frequency-response curve of Figure 8, the 0.1 Hz corner is defined by only one pole. The test time of 10 seconds acts as an additional pole to eliminate noise contribution from the frequency band below 0.1 Hz. 5. A noise-voltage-density test is recommended when measuring noise on a large number of units. A 10 Hz noise voltage-density measurement will correlate well with a 0.1 Hz to 10 Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. 6. Power should be supplied to the test circuit by well bypassed low noise supplies, e.g. batteries. These will minimize output noise introduced via the amplifier supply pins.
100
The OP470 is a monolithic device with four identical amplifiers. The noise voltage density of each individual amplifier will match, giving:
e OUT = 101 E 4e n 2 = 101 (2e n ) E
NOISE MEASUREMENT--CURRENT NOISE DENSITY
The test circuit shown in Figure 10 can be used to measure current noise density. The formula relating the voltage output to current noise density is: E A E
nOUT 2
in = where:
- 40nV/ Hz G RS
(
)
2
80
G = gain of 10000 RS = 100 kW source resistance
R3 1.24k
GAIN - dB
60
40
R1 5
R2 100k
20
OP470 DUT OP27E
R5 8.06k
0.1 1 FREQUENCY - Hz 10 100
en OUT TO SPECTRUM ANALYZER
0 0.01
R4 200
Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test Circuit Frequency Response
NOISE MEASUREMENT--NOISE VOLTAGE DENSITY
GAIN = 50,000 VS = 5V
Figure 10. Current Noise Density Test Circuit
The circuit of Figure 9 shows a quick and reliable method of measuring the noise voltage density of quad op amps. Each individual amplifier is series-connected and is in unity-gain, save the final amplifier which is in a noninverting gain of 101. Since the ac noise voltages of each amplifier are uncorrelated, they add in rms fashion to yield:
e OUT = 101 E e nA 2 + e nB 2 + e nC 2 + e nD 2 E
R1 100 R2 10k
1/4 OP470
1/4 OP470
1/4 OP470
1/4 OP470
eOUT TO SPECTRUM ANALYZER
eOUT (nV Hz) = 101(2en) VS = 15V
Figure 9. Noise Voltage Density Test Circuit
REV. A
-11-
OP470
CAPACITIVE LOAD DRIVING AND POWER SUPPLY CONSIDERATIONS
R1
The OP470 is unity-gain stable and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP470. In the standard feedback amplifier, the op amp's output resistance combines with the load capacitance to form a low pass filter that adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 11. The added components, C1 and R3, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 11 are for a load capacitance of up to 1000 pF when used with the OP470.
V+ C2 10 F + C3 0.1 F
OP470
2V/ s
Figure 12. Pulsed Operation
During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf 500 W, the output is capable of handling the current requirements (IL < 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. When Rf > 3 kW, a pole created by Rf and the amplifier's input capacitance (2 pF) creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf helps eliminate this problem.
R2 R1 C1 1000pF
APPLICATIONS Low Noise Amplifier
VOUT CL 1000pF
VIN
OP470
100 *
R3 50 C4 10 F +
*
C5 0.1 F
*SEE TEXT
A simple method of reducing amplifier noise by paralleling amplifiers is shown in Figure 13. Amplifier noise, depicted in Figure 14, is around 2 nV//Hz @ 1 kHz (R.T.I.). Gain for each paralleled amplifier and the entire circuit is 1000. The 200 W resistors limit circulating currents and provide an effective output resistance of 50 W. The amplifier is stable with a 10 nF capacitive load and can supply up to 30 mA of output drive.
+15V VIN R1 50 R3 200
V- PLACE SUPPLY DECOUPLING CAPACITORS AT OP470
Figure 11. Driving Large Capacitive Loads
In applications where the OP470's inverting or noninverting inputs are driven by a low source impedance (under 100 W) or connected to ground, if V+ is applied before V-, or when V is disconnected, excessive parasitic currents will flow. Most applications use dual tracking supplies and with the device supply pins properly bypassed, power-up will not present a problem. A source resistance of at least 100 W in series with all inputs (Figure 11) will limit the parasitic currents to a safe level if V- is disconnected. It should be noted that any source resistance, even 100 W, adds noise to the circuit. Where noise is required to be kept at a minimum, a germanium or Schottky diode can be used to clamp the V- pin and eliminate the parasitic current flow instead of using series limiting resistors. For most applications, only one diode clamp is required per board or system. When Rf 100 W and the input is driven with a fast, large signal pulse(> 1 V), the output waveform will look as shown in Figure 12.
UNITY-GAIN BUFFER APPLICATIONS
1/4 OP470E
R2 50k
-15V
R4 50
1/4 OP470E
R5 50k
R6 200
VOUT = 1000VIN R9 200
R7 50
1/4 OP470E
R8 50k
R10 50
1/4 OP470E
R11 50k
R12 200
Figure 13. Low Noise Amplifier
-12-
REV. A
OP470
NOISE DENSITY - 0.58nV/ Hz/DIV REFERRED TO INPUT
100 90
100
A OUT
90
10 0%
A OUT
10 0%
5V
5V
1ms
Figure 14. Noise Density of Low Noise Amplifier, G = 1000
DIGITAL PANNING CONTROL
Figure 16. Digital Panning Control Output
Figure 15 uses a DAC-8408, quad 8-bit DAC to pan a signal between two channels. The complementary DAC current outputs two of the DAC-8408's four DACs drive current-to-voltage converters built from a single quad OP470. The amplifiers have complementary outputs with the amplitudes dependent upon the digital code applied to the DAC. Figure 16 shows the complementary outputs for a 1 kHz input signal and digital ramp applied to the DAC data inputs. Distortion of the digital panning control is less than 0.01%.
5V
Gain error due to the mismatching between the internal DAC ladder resistors and the current-to-voltage feedback resistors is eliminated by using feedback resistors internal to the DAC. Of the four DACs available in the DAC-8408, only two DACs, A and C, actually pass a signal. DACs B and D are used to provide the additional feedback resistors needed in the circuit. If the VREFB and VREFD inputs remain unconnected, the current-to-voltage converters using RFBB and RFBD are unaffected by digital data reaching DACs B and D.
DAC-8408GP
VDD
RFBA 20pF +15V
SIDE A IN
VREFA
DAC A
IOUT1A
1/4 OP470E
A OUT
IOUT2A/2B DAC B IOUT1B 20pF RFBB
-15V
1/4 OP470E
A OUT
RFBC SIDE B IN VREFC DAC C IOUT1C
20pF
1/4 OP470E
B OUT
DAC DATA BUS PINS 9 (LSB) - 16 (MSB) IOUT2C/2D 5V 1k A/B 1k R/W DS1 DAC SELECT DS2 DGND RFBD DAC D IOUT1D 20pF
1/4 OP470E
B OUT
Figure 15. Digital Panning Control Circuit
REV. A
-13-
OP470
SQUELCH AMPLIFIER FIVE-BAND LOW-NOISE STEREO GRAPHIC EQUALIZER
The circuit of Figure 17 is a simple squelch amplifier that uses a FET switch to cut off the output when the input signal falls below a preset limit. The input signal is sampled by a peak detector with a time constant set by C1 and R6. When the output of the peak detector (Vp), falls below the threshold voltage, (VTH), set by R8, the comparator formed by op amp C switches from V- to V+. This drives the gate of the N-channel FET high, turning it ON, reducing the gain of the inverting amplifier formed by op amp A to zero.
The graphic equalizer circuit shown in Figure 18 provides 15 dB of boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz bandwidth is better than 100 dB referred to a 3 Vrms input. Larger inductors can be replaced by active inductors but this reduces the signal-to-noise ratio.
C1 0.47 F VIN R1 47k
1/4 OP470E
R2 3.3k
1/4 OP470E
L1 1H R4 1k 60Hz R4 1k 200Hz R4 1k 800Hz R4 1k 3kHz R4 1k 10kHz R13 3.3k
R14 100
VOUT
R5 100k 2N5434 R2 10k VIN R1 2k
D2 1N4148
R3 680
C2 6.8 F + TANTALUM
R5 680
C3 1F + TANTALUM
L2 1H
1/4 OP470E A
R4 10k R3 2k
R7 680
VOUT - -5VIN
C4 0.22 F + TANTALUM
L3 1H
R9 680
C5 0.047 F + TANTALUM
L4 1H
1/4 OP470E B
D1 1N4148 C1 1F R6 1M
1/4 OP470E C
R4 10M
R11 680
C6 0.022 F + TANTALUM
L5 1H
Figure 18. Five-Band Low Noise Graphic Equalizer
= 1 SECOND
R7 10k
C2 10 F +
V+
R6 10k
Figure 17. Squelch Amplifier
-14-
REV. A
OP470
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Cerdip Package (Q-14)
0.005 (0.13) MIN
14
14-Lead PDIP Package (N-14)
0.795 (20.19) 0.725 (18.42)
14 1 8 7
0.098 (2.49) MAX
8 7
PIN 1
1
0.310 (7.87) 0.220 (5.59) 0.320 (8.13) 0.290 (7.37) 0.060 (1.52) 0.015 (0.38) PIN 1
0.280 (7.11) 0.240 (6.10) 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204)
0.100 (2.54) BSC 0.785 (19.94) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36)
0.100 (2.54) BSC
0.150 (3.81) MIN 0.070 (1.78) SEATING 15 PLANE 0 0.030 (0.76)
0.015 (0.38) 0.008 (0.20)
0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) 0.022 (0.558) 0.070 (1.77) SEATING PLANE 0.014 (0.356) 0.045 (1.15)
0.060 (1.52) 0.015 (0.38)
16-Lead SOIC Package (R-16)
0.4133 (10.50) 0.3977 (10.00)
16 9
0.2992 (7.60) 0.2914 (7.40)
1 8
0.4193 (10.65) 0.3937 (10.00)
PIN 1
0.050 (1.27) BSC
0.1043 (2.65) 0.0926 (2.35)
0.0291 (0.74) 0.0098 (0.25)
45
0.0118 (0.30) 0.0040 (0.10)
8 0.0192 (0.49) SEATING 0 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23)
0.0500 (1.27) 0.0157 (0.40)
Revision History
Location Data Sheet changed from REV. 0 to REV. A. Page
28-Lead LCC (RC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 28-Lead LCC (TC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
REV. A
-15-
-16-
C00305-0-4/02(A)
PRINTED IN U.S.A.

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